Generally, in the prior art, in an array process stage of the liquid crystal display panel, a gate driving circuit is formed on an array substrate using gate driver on array (GOA) technology, thereby performing scan driving on the gate lines line by line. The technology can reduce a bonding process of external IC chips and improve integration of the liquid crystal display panel. Furthermore, the GOA circuit typically includes multiple levels of GOA units, and each level of the GOA unit drives a horizontal scan line, and the GOA unit comprises a pull-up unit, a pull-up controlling unit, a pull-down unit, a pull-down holding unit, a voltage boosting unit, and a reset unit, wherein the pull-up unit is configured to output a clock signal as a gate signal, the pull-up controlling unit is configured to control a working time of the pull-up unit and connected to a downlink signal output by the previous level GOA unit, the pull-down unit is configured to pull the gate signal to a voltage, the pull-down holding unit is configured to hold the gate signal and maintain the controlling signal of the pull-up unit at a low voltage.
However, the GOA unit of NMOS transistor requires a high voltage at the level transmission of holding signal through the capacitance of the Q node, and thin film transistor (TFT) is not an ideal transistor. Even in the case of shutdown, the TFT still has a certain leakage current so that the touch period (TP term) lasts long. The touch panel (TP) pause level requires a long time to maintain a high voltage, thereby reducing level transmission stability of the GOA unit.